********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Oct 27, 2014
*ECN S14-2137, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiSS40DN D G S 
M1 3 GX S S NMOS W= 1838480u L= 0.3u 
M2 S GX S D PMOS W= 1838480u L= 0.35u
R1 D 3 1.504e-02 6.679e-03 2.023e-05 
CGS GX S 5.764e-10 
CGD GX D 1.000e-13 
RG G GY 0.90 
RTCV 100 S 1e6 7.163e-04 4.922e-06 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 1838480u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 6.727e-06 NSUB = 1.0301e+17 
+ KAPPA = 2.638e-03 NFS = 2.300e+11
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 1.682e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-08 TREF = 25 BV = 101 
+RS = 4.694e-03 N = 1.132e+00 IS = 5.617e-12 
+EG = 1.240e+00 XTI = 1.706e-01 TRS = 2.493e-03 
+CJO = 6.330e-10 VJ = 4.952e+00 M = 7.091e-01 ) 
.ENDS 
